A Low-Noise 0.001Hz-lkHz Sample-Level Duty-Cycling Neural Recording System-on-Chip

Author:

Wu Jiajia1,Akinin Abraham2,Lee Min1,Paul Akshay1,Lu Hongyu1,Park Yongjae3,Fowler Preston1,Kim Seong-Jin3,Mercier Patrick P.1,Cauwenberghs Gert1

Affiliation:

1. University of California,San Diego, La Jolla,CA,USA

2. Lawrence Livermore National Laboratory,Livermore,CA,USA

3. Ulsan National Institute of Science and Technology,Ulsan,South Korea

Funder

National Institutes of Health NIMH/NINDS

Lawrence Livermore National Laboratory

Publisher

IEEE

Reference7 articles.

1. A 77-db dr 16-ch 2 nd-order neural recording chip with 0.0077 mm 2/ch;wang;2021 Symposium on VLSI Circuits,2021

2. A PVT-Robust AFE-Embedded Error-Feedback Noise-Shaping SAR ADC With Chopper-Based Passive High-Pass IIR Filtering for Direct Neural Recording

3. A 0.7 v 17fj/step-fom w 178.1 db-fom sndr 10khz-bw 560mv pp true-exg biopotential acquisition system with parasitic-insensitive input impedance in cmos;lee;IEEE International Solid-State Circuits Conference ISSCC 2022,2022

4. A Chopped Ultra-Low-Power, Low-Noise Wearable EEG Amplifier with Pseudo-Resistor Calibration

5. 28.1 A Distortion-Free VCO-Based Sensor-to-Digital Front-End Achieving 178.9dB FoM and 128dB SFDR with a Calibration-Free Differential Pulse-Code Modulation Technique

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