ANN Inference enabled by Variability Mitigation using 2T-1R Bit Cell-based Design Space Analysis
Author:
Affiliation:
1. Indian Institute of Technology Bombay,Department of Electrical Engineering,Mumbai,India
2. GlobalFoundries,Santa Clara,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10181241/10181318/10181912.pdf?arnumber=10181912
Reference21 articles.
1. Comprehending In-memory Computing Trends via Proper Benchmarking
2. Memory devices and applications for in-memory computing
3. Array-Level Programming of 3-Bit per Cell Resistive Memory and Its Application for Deep Neural Network Inference
4. RADAR: A Fast and Energy-Efficient Programming Technique for Multiple Bits-Per-Cell RRAM Arrays
5. A Temporally and Spatially Local Spike-based Backpropagation Algorithm to Enable Training in Hardware;biswas;ArXiv,2022
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