Author:
Birtwistle Graham,Stevens Kenneth S.
Cited by
12 articles.
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1. Investigation of asynchronous pipeline circuits based on bundled-data encoding: Implementation styles, behavioral modeling, and timing analysis;Tsinghua Science and Technology;2022-06
2. State Encoding of Asynchronous Controllers Using Pseudo-Boolean Optimization;2018 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC);2018-05
3. Timing Path-Driven Cycle Cutting for Sequential Controllers;ACM Transactions on Design Automation of Electronic Systems;2016-09-22
4. Reconfigurable circuit for implementation of family of 4-phase latch protocols;2016 26th International Conference on Field Programmable Logic and Applications (FPL);2016-08
5. Early-zero 4-phase micro-pipeline controller with protection;Proceedings of the 16th International Conference on Computer Systems and Technologies - CompSysTech '15;2015