Investigating Various Adder Architectures for Digital In-Memory Computing Using MAGIC-based Memristor Design Style

Author:

Jha Chandan Kumar1,Mahzoon Alireza2,Drechsler Rolf1

Affiliation:

1. DFKI GmbH,German Research Center for Artificial Intelligence,Bremen,Germany

2. Institute of Computer Science, University of Bremen,Bremen,Germany

Funder

German Research Foundation (DFG)

Publisher

IEEE

Reference15 articles.

1. Recent Findings in Boolean Techniques

2. Polynomial Formal Verification of Prefix Adders

3. Improvements to combinational equivalence checking;mishchenko;2006 IEEE/ACM International Conference on Computer Aided Design,0

4. REVSCA-2.0: SCA-based Formal Verification of Non-trivial Multipliers using Reverse Engineering and Local Vanishing Removal

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1. Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

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