Silicon nano-transistors and breaking the 10 nm physical gate length barrier-Reference-Cited by-同舟云学术

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Silicon nano-transistors and breaking the 10 nm physical gate length barrier

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Container-title:61st Device Research Conference. Conference Digest (Cat. No.03TH8663)
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Author:

Chau R.,Doyle B.,Doczy M.,Datta S.,Hareland S.,Jin B.,Kavalieros J.,Metz M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/8693/27536/01226901.pdf?arnumber=1226901

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Carbon nanotube field effect transistors: an overview of device structure, modeling, fabrication and applications;Physica Scripta;2023-08-01

2. Analysis of carbon nanotube for low power nano electronics applications;i-manager’s Journal on Electronics Engineering;2023

3. First Principle and NEGF Based Study of Silicon Nano-wire and Nano-sheet for Next Generation FETs: Performance, Interface Effects and Lifetime;2020 IEEE 20th International Conference on Nanotechnology (IEEE-NANO);2020-07

4. Modulation of the Work Function by the Atomic Structure of Strong Organic Electron Acceptors on H‐Si(111);Advanced Electronic Materials;2019-03-18

5. Carbon nanotube field effect transistors: toward future nanoscale electronics;International Journal of Computers and Applications;2018-01-03

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