Author:
Selvi S. Sethu,D Bharanidharan,Qadir Abdul,R Pavan K
Cited by
4 articles.
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1. Multiple Face Detection and Recognition for System-an-Chip FPGAs;2024 21st International Joint Conference on Computer Science and Software Engineering (JCSSE);2024-06-19
2. Designing a Bare Minimum Face Recognition Architecture for Bare Metal Edge Devices: An Experience Report;The Third International Conference on Artificial Intelligence and Machine Learning Systems;2023-10-25
3. Development of a High-Speed and Accurate Face Recognition System Based on FPGAs;Intelligent Systems and Networks;2023
4. Modeling and implementing the behavior of RR robot using FPGA;Signal Processing, Sensor/Information Fusion, and Target Recognition XXXI;2022-06-08