Cryogenic CMOS Performance Analysis Including BEOL Characteristics at 4K for Quantum Controller Application
Author:
Affiliation:
1. NanoBridge Semiconductor, Inc.,Tsukuba,Japan
2. The University of Tokyo,Bunkyo,Japan
3. Keio University,Yokohama,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9881276/9881277/09881293.pdf?arnumber=9881293
Reference6 articles.
1. Improving Reliability of Copper Dual-Damascene Interconnects by Impurity Doping and Interface Strengthening
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1. Investigation and Subcircuit Modeling of Self-Heating in PDSOI NFETs at Cryogenic Temperatures Using Pulsed I – V Technique for Co-Integrated Quantum Technologies;IEEE Transactions on Electron Devices;2024-09
2. Superconducting Nb interconnects for Cryo-CMOS and superconducting digital logic applications;Japanese Journal of Applied Physics;2024-04-01
3. Design and analysis of a high-speed low-power comparator with regeneration enhancement and through current suppression techniques from 4 K to 300 K in 65-nm Cryo-CMOS;Microelectronics Journal;2024-02
4. A 65nm Cryogenic CMOS Design and Performance at 4.2K for Quantum State Controller Application;IEEE Journal of the Electron Devices Society;2024
5. Overview of Cryo-CMOS Devices and Circuits for Quantum Computing Applications;2023 IEEE International Symposium on Smart Electronic Systems (iSES);2023-12-18
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