A Design Methodology of MOS Current Mode Logic Pre-Scaler for ZigBee Applications
Author:
Affiliation:
1. National Institute of Technology Sikkim,Department of Electronics and Communication Engineering,Ravangla,India
Funder
Visvesvaraya Ph.D. Scheme, MeitY, Govt. of India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9732630/9732704/09732723.pdf?arnumber=9732723
Reference11 articles.
1. Divide-by-3 injection-locked frequency dividers using dual-resonance resonator
2. Low-power Ka band injection-locked frequency dividers using distributed LC tanks
3. A Design Methodology for MOS Current-Mode Logic Frequency Dividers
4. An injection-locked frequency divider by three with switching cross-couple architecture
5. IEEE Standard for Low-Rate Wireless Networks - Amendment 7: Defining Enhancements to the Smart Utility Network (SUN) Physical Layers (PHYs) Supporting up to 2.4 Mb/s Data Rates
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