Impact of gate stack processing on the hysteresis of 300 mm integrated WS2 FETs
Author:
Affiliation:
1. KU Leuven,Heverlee,Belgium,3001
2. imec,Heverlee,Belgium,3001
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10117589/10117581/10117803.pdf?arnumber=10117803
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5. Comparison of trapped charges and hysteresis behavior in hBN encapsulated single MoS2 flake based field effect transistors on SiO2 and hBN substrates
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1. Evidence of contact-induced variability in industrially-fabricated highly-scaled MoS2 FETs;npj 2D Materials and Applications;2024-07-14
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