A Concise Electrothermal Model to Characterize the Thermal Safe-Operating Area of Power Transistor
Author:
Affiliation:
1. Vanguard-International Semiconductor Cop.,Device Engineering Department,Hsin-Chu City,Taiwan
2. National Yang Ming Chiao Tung University,Department of Electrical and Computer Engineering,Hsin-Chu City,Taiwan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10117589/10117581/10117633.pdf?arnumber=10117633
Reference22 articles.
1. Determination of Threshold Failure Levels of Semiconductor Diodes and Transistors Due to Pulse Voltages
2. Physical Model for ESD Human-Body Mode to Transmission Line Pulse;lee;Proc IEEE Int Rel Phy Symp (IRPS),2018
3. The Influence of the Layout on the ESD Performance of HV-LDMOS;lee;Proc IEEE Int Symp on Power Semi Dev & ICs (ISPSD),2010
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