Simulink Implementation of MFCC for Audio Signal Processing Applications
Author:
Affiliation:
1. PSG Institute of Technology and Applied Research,Department of ECE
2. PSG Institute of Technology and Applied Research,Department of ECE,Tamilnadu,India
3. PSG College of Technology,Department of ECE
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10434934/10434939/10435250.pdf?arnumber=10435250
Reference20 articles.
1. A low latency modular-level deeply integrated MFCC feature extraction architecture for speech recognition
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3. Frame blocking and windowing speech signal;Hamid;Journal of Information, Communication, and Intelligence Systems (JICIS),2018
4. A 2.5 μW KWS Engine with Pruned LSTM and Embedded MFCC for IoT Applications
5. FPGA Implementation of Speech Recognizer for Isolated Words
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