Selective Harmonic Elimination Control for Cascaded Digital Power Amplifier
Author:
Funder
Research and Development
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9332523/9332525/09332643.pdf?arnumber=9332643
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Dead-Time Compensation Based on Current Phase Estimation for High-Frequency Cascaded Transformer Multilevel Inverter;IEEE Journal of Emerging and Selected Topics in Power Electronics;2024-08
2. Interior-point-method-based switching angle computation for selective harmonic elimination in high-frequency cascaded H-bridge multilevel inverters;Journal of Power Electronics;2024-03-28
3. Low-Carrier-Ratio Model Predictive Control for 100 kHz Large-Signal Multiphase Converters With Low THD;IEEE Transactions on Power Electronics;2024-02
4. A Digital Processing Method of MSK Signal Based on ADC;2022 IEEE 3rd China International Youth Conference on Electrical Engineering (CIYCEE);2022-11-03
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