Configurable 8T SRAM-based Computing In- Memory Architecture for Enabling Shift Operation and Multibit Dot-Product Engines-Reference-Cited by-同舟云学术

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Configurable 8T SRAM-based Computing In- Memory Architecture for Enabling Shift Operation and Multibit Dot-Product Engines

Published:2023-04-07 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE Devices for Integrated Circuit (DevIC)
language:
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Author:

Yeswanth Chakka¹,Panwar Sourabh¹,Srivastava Shobhit¹,Joshi Deepak¹,M Shashidhara¹,Acharya Abhishek¹

Affiliation:

1. S.V. National Institute of Technology Surat,Department of Electronics,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10134754/10134560/10134803.pdf?arnumber=10134803

Reference19 articles.

1. Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density

2. Investigation of Self-Heating Effect in Tree-FETs by Interbridging Stacked Nanosheets: A Reliability Perspective

3. Characterization of novel 8T SRAMwith low leakage and optimized area;sharif;Carpathian Journal of Electrical Engineering,2019

4. Digital integrated circuits: a design perspective;rabaey;Upper Saddle River NJ Pearson Education,2003

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