Depth-Reliability-Based Stereo-Matching Algorithm and Its VLSI Architecture Design-Reference-Cited by-同舟云学术

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Depth-Reliability-Based Stereo-Matching Algorithm and Its VLSI Architecture Design

Published:2015-06 Issue:6 Volume:25 Page:1038-1050
ISSN:1051-8215
Container-title:IEEE Transactions on Circuits and Systems for Video Technology
language:
Short-container-title:IEEE Trans. Circuits Syst. Video Technol.

Author:

Yang Der-Wei,Chu Li-Chia,Chen Chun-Wei,Wang Jonas,Shieh Ming-Der

Funder

Himax Technologies, Inc., Tainan, Taiwan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Media Technology

Link

http://xplorestaging.ieee.org/ielx7/76/7116636/06915853.pdf?arnumber=6915853

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Real-time Design of Stereo Vision System using Disparity Calibration;2024 Fifteenth International Conference on Ubiquitous and Future Networks (ICUFN);2024-07-02

2. Model Based Design of a Real Time FPGA-Based Lens Undistortion and Image Rectification Algorithm for Stereo Imaging;IEEE Access;2023

3. A High-Throughput Depth Estimation Processor for Accurate Semiglobal Stereo Matching Using Pipelined Inter-Pixel Aggregation;IEEE Transactions on Circuits and Systems for Video Technology;2022-01

4. Robotic Computing on FPGAs;Synthesis Lectures on Computer Architecture;2021-06-29

5. A Survey of FPGA-Based Robotic Computing;IEEE Circuits and Systems Magazine;2021

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