Atomic Coherence: Leveraging nanophotonics to build race-free cache coherence protocols
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5743111/5749710/05749723.pdf?arnumber=5749723
Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Towards Efficient On-Chip Communication: A Survey on Silicon Nanophotonics and Optical Networks-on-Chip;Journal of Systems Architecture;2024-07
2. Turn-based Spatiotemporal Coherence for GPUs;ACM Transactions on Architecture and Code Optimization;2023-07-19
3. Joint security and performance improvement in multilevel shared caches;IET Information Security;2021-04-14
4. RaceR: A Thread Mapping Algorithm for Race Reduction in Multi-Level Shared Caches;2019 27th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP);2019-02
5. A Process-Variation-Tolerant Method for Nanophotonic On-Chip Network;ACM Journal on Emerging Technologies in Computing Systems;2018-04-30
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