Author:
Udipi Aniruddha N.,Muralimanohar Naveen,Balasubramonian Rajeev
Cited by
13 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Hybrid, Asymmetric and Reconfigurable Input Unit Designs for Energy-Efficient On-Chip Networks;IEICE Transactions on Electronics;2023-10-01
2. CryoWire: wire-driven microarchitecture designs for cryogenic computing;Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems;2022-02-22
3. Routerless networks-on-chip;Advances in Computers;2022
4. Simultaneous accessing of multiple SRAM subregions forming configurable and automatically generated memory fields;International Journal of Circuit Theory and Applications;2021-04-14
5. On-Chip Networks, Second Edition;Synthesis Lectures on Computer Architecture;2017-06-17