Author:
Benso A.,Di Carlo S.,Di Natale G.,Prinetto P.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software,Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
10 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. On the Feasibility of Built-In Self Repair for Logic Circuits;2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems;2011-10
2. A Delay Estimation of Rescheduling Schemes for Static Scheduled Processor Architectures;FERS-Mitteilungen;2010-01
3. Logic Self Repair Based on Regular Building Blocks;FERS-Mitteilungen;2010-01
4. A Concept for Logic Self Repair;2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools;2009-08
5. A scheme of logic self repair including local interconnects;2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems;2009