ESD in CMOS Integrated Circuit
Author:
Affiliation:
1. Glasgow College, UESTC,Glasgow,Chengdu,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10256676/10257667/10257879.pdf?arnumber=10257879
Reference13 articles.
1. Silicon-Controlled Rectifier Stacking Structure for High-Voltage ESD Protection Applications
2. Bidirectional Diode-Triggered Silicon-Controlled Rectifiers for Low-Voltage ESD Protection
3. Engineering design of the power transient voltage suppressors for network protection devices
4. Modeling the static and dynamic behavior of multi-layer varistors in the threshold voltage region depending on the DC operating point
5. ESD Implantations for On-Chip ESD Protection With Layout Consideration in 0.18-<tex>$muhbox m$</tex>Salicided CMOS Technology
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