Effect of Silicon Substrate Roughness on Silver-Based Backside Metallization for Power Electronics Packaging-Reference-Cited by-同舟云学术

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Effect of Silicon Substrate Roughness on Silver-Based Backside Metallization for Power Electronics Packaging

Published:2023-05-10 Issue: Volume: Page:
ISSN:
Container-title:2023 46th International Spring Seminar on Electronics Technology (ISSE)
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Author:

Miskovic Goran¹,Bellaredj Mohamed Lamine Faycal¹

Affiliation:

1. Silicon Austria Labs,Villach,Austria

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10168303/10168312/10168377.pdf?arnumber=10168377

Reference17 articles.

1. Effect of Wafer Back Metal Thickness and Surface Roughness towards Backend Assembly Processes

2. The interfacial interaction of Ti/Ni/Ag/Au Multilayer under thermal cycling test;yeh;IEEE 14th International Conference on Electronic Materials and Packaging (EMAP),2012

3. Ultrathin Wafer Pre-Assembly and Assembly Process Technologies: A Review

4. High speed silicon wet anisotropic etching for applications in bulk micromachining: a review

5. Auger electron spectroscopy characterization of Ti/NiV/Ag multilayer back-metal for monitoring of Ni migration on Ag surface;ricciari;Microelectronics Reliability 55 9-10,2015

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Calculation of the resistance of silver-based backside metallization stack for die-attach packaging applications;2023 46th International Spring Seminar on Electronics Technology (ISSE);2023-05-10

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