Estimating the Process Variation Effects of Stacked Gate All Around Si Nanosheet CFETs Using Artificial Neural Network Modeling Framework-Reference-Cited by-同舟云学术

Estimating the Process Variation Effects of Stacked Gate All Around Si Nanosheet CFETs Using Artificial Neural Network Modeling Framework

Published:2022-07-04 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE 22nd International Conference on Nanotechnology (NANO)
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Author:

Butola Rajat¹,Li Yiming²,Kola Sekhar Reddy¹,Chuang Min-Hui³,Akbar Chandni³

Affiliation:

1. National Yang Ming Chiao Tung University,Parallel and Scientific Computing Laboratory, Electrical Engineering and Computer Science International Graduate Program,Department of Electrical Engineering and Computer Engineering,Hsinchu,Taiwan,300

2. Institute of Communications Engineering, Institute of Biomedical Engineering, and Center for mm Wave Smart Radar System and Technologies, National Yang Ming Chiao Tung University,Department of Electrical Engineering and Computer Engineering,Hsinchu,Taiwan,30010

3. Parallel and Scientific Computing Laboratory and Institute of Communications Engineering National Yang Ming Chiao Tung University,Hsinchu,Taiwan,300

Funder

Ministry of Science and Technology (MOST)

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9928528/9928587/09928645.pdf?arnumber=9928645

Reference16 articles.

1. Design and System Technology Co-Optimization Sensitivity Prediction for VLSI Technology Development using Machine Learning;cheng;ACM International Workshop on Systems-level Interconnection Prediction,2022

2. Prediction of Process Variation Effect for Ultrascaled GAA Vertical FET Devices Using a Machine Learning Approach

3. Inverse Design of Graphene FET by Deep Neural Network

4. Machine Learning Approach for Predicting the Effect of Statistical Variability in Si Junctionless Nanowire Transistors

5. Machine Learning Aided Device Simulation of Work Function Fluctuation for Multichannel Gate-All-Around Silicon Nanosheet MOSFETs

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1. Statistical Device Simulation and Machine Learning of Process Variation Effects of Vertically Stacked Gate-All-Around Si Nanosheet CFETs;IEEE Transactions on Nanotechnology;2024

2. Intrinsic Parameter Fluctuation and Process Variation Effect of Vertically Stacked Silicon Nanosheet Complementary Field-Effect Transistors;2023 24th International Symposium on Quality Electronic Design (ISQED);2023-04-05