A ReRAM-Based Convolutional Neural Network Accelerator Using the Analog Layer Normalization Technique-Reference-Cited by-同舟云学术

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A ReRAM-Based Convolutional Neural Network Accelerator Using the Analog Layer Normalization Technique

Published:2023-06 Issue:6 Volume:70 Page:6442-6451
ISSN:0278-0046
Container-title:IEEE Transactions on Industrial Electronics
language:
Short-container-title:IEEE Trans. Ind. Electron.

Author:

Gi Sang-Gyun¹^ORCID,Lee Hyunkeun²^ORCID,Jang Jingon³^ORCID,Lee Byung-Geun¹^ORCID

Affiliation:

1. School of Electrical Engineering and Computer Science, Gwangju Institute of Science and Technology, Gwangju, Republic of Korea

2. Korea Institute of Industrial Technology (KITECH), Cheonan, Republic of Korea

3. KU-KIST Graduate School of Converging Science and Technology, Korea University, Seoul, Republic of Korea

Funder

National Research Foundation of Korea

Korean government

Ministry of Science and ICT, South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

http://xplorestaging.ieee.org/ielx7/41/10026526/09834290.pdf?arnumber=9834290

Reference25 articles.

1. An Energy-Efficient Digital ReRAM-Crossbar-Based CNN With Bitwise Parallelism

2. Group Normalization

3. On-Chip Memory Based Binarized Convolutional Deep Neural Network Applying Batch Normalization Free Technique on an FPGA

4. In-memory batch-normalization for resistive memory based binary neural network hardware

5. Device and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM Arrays

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