IPP@HDL: Efficient Intellectual Property Protection Scheme for IP Cores

Author:

Castillo Encarnacin,Meyer-Baese Uwe,Garcia Antonio,Parrilla Luis,Lloris Antonio

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 85 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Multi-cut based architectural obfuscation and handprint biometric signature for securing transient fault detectable IP cores during HLS;Integration;2024-03

2. Practical Implementation of Robust State-Space Obfuscation for Hardware IP Protection;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-02

3. CAD Tools Pathway in Hardware Security;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

4. MAO: Memory Architecture Obfuscation;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18

5. FPGA-based Realization of Processor Unit with Key-Based Logical Obfuscation;2023 International Conference on Intelligent Technologies for Sustainable Electric and Communications Systems (iTech SECOM);2023-12-18

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