A 270-mA Self-Calibrating-Clocked Output-Capacitor-Free LDO With 0.15–1.15V Output Range and 0.183-fs FoM
Author:
Affiliation:
1. Graduate School of Convergence Science and Technology, Research Institute for Convergence Science, and the Inter-University Semiconductor Research Center Seoul National University, Seoul, South Korea
Funder
National Research Foundation of Korea
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/9874436/09798800.pdf?arnumber=9798800
Reference21 articles.
1. Fast-transient asynchronous digital LDO with load regulation enhancement by soft multi-step switching and adaptive timing techniques in 65-nm CMOS
2. A Fully Integrated Digital Low-Dropout Regulator Based on Event-Driven Explicit Time-Coding Architecture
3. A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response
4. A 0.4 V 430 nA quiescent current NMOS digital LDO with NAND-based analog-assisted loop in 28 nm CMOS;ma;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2018
5. A modular hybrid LDO with fast load-transient response and programmable PSRR in 14 nm CMOS featuring dynamic clamp tuning and time-constant compensation;liu;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2019
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