A Tri-Mode Reconfigurable Receiver for GNSS/NB-IoT/BLE With 68-dB HR3 and 60-dB IMRR in 28-nm CMOS
Author:
Affiliation:
1. State Key Laboratory of Integrated Chips and System, Fudan University, Shanghai, China
Funder
National Key Research and Development Program of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/10194475/10143213.pdf?arnumber=10143213
Reference36 articles.
1. A 1.8 dB NF Blocker-Filtering Noise-Canceling Wideband Receiver With Shared TIA in 40 nm CMOS
2. A Compact, Reconfigurable Receiver for IRNSS/GPS/Galileo/Beidou
3. A Blocker-Tolerant, Noise-Cancelling Receiver Suitable for Wideband Wireless Applications
4. A Blocker-Tolerant RF Front End With Harmonic-Rejecting $N$ -Path Filter
5. An LO Leakage Suppression Technique for Blocker-Tolerant Wideband Receivers With High-Q Selectivity at RF Input
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