Funder
National Research Foundation of Korea
Korea Institute of Energy Technology Evaluation and Planning
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
21 articles.
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1. TeRa: Ternary and Range based packet classification engine;Integration;2024-05
2. DSCAM+: Latency-Guaranteed FPGA-Based Content Addressable Memory for SDN-Enabled Forwarding Plane;2023 IEEE International Conference on High Performance Computing & Communications, Data Science & Systems, Smart City & Dependability in Sensor, Cloud & Big Data Systems & Application (HPCC/DSS/SmartCity/DependSys);2023-12-17
3. Using FPGA-based content-addressable memory for mnemonics instruction searching in assembler design;The Journal of Supercomputing;2023-05-07
4. Optimizing Packet Classification on FPGA;2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS);2023-05-03
5. A case study: Understanding The Nature of Memories Architectures in FPGAs to Built-up Bi-CAM;Mühendislik Bilimleri ve Araştırmaları Dergisi;2023-04-30