Funder
Ministry of Science and Technology, Taiwan
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
10 articles.
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1. A Systolic Array-Based Scheduling Strategy for Sparse CNN Accelerators;IEEE Transactions on Circuits and Systems II: Express Briefs;2023
2. Algorithm-Oriented SIMD Computer Mathematical Model and Its Application;International Journal of Information and Communication Technology Education;2022-12-23
3. DASC: A DRAM Data Mapping Methodology for Sparse Convolutional Neural Networks;2022 Design, Automation & Test in Europe Conference & Exhibition (DATE);2022-03-14
4. Accelerator for Sparse Convolutional Neural Networks Based on Shift Units;2021 IEEE 2nd International Conference on Information Technology, Big Data and Artificial Intelligence (ICIBA);2021-12-17
5. Block-Based Compression and Corresponding Hardware Circuits for Sparse Activations;Sensors;2021-11-10