Exploring Compute-in-Memory Architecture Granularity for Structured Pruning of Neural Networks-Reference-Cited by-同舟云学术

Exploring Compute-in-Memory Architecture Granularity for Structured Pruning of Neural Networks

Published:2022-12 Issue:4 Volume:12 Page:858-866
ISSN:2156-3357
Container-title:IEEE Journal on Emerging and Selected Topics in Circuits and Systems
language:
Short-container-title:IEEE J. Emerg. Sel. Topics Circuits Syst.

Author:

Meng Fan-Hsuan¹,Wang Xinxin¹^ORCID,Wang Ziyu¹^ORCID,Lee Eric Yeu-Jer¹,Lu Wei D.¹^ORCID

Affiliation:

1. Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA

Funder

National Science Foundation

Semiconductor Research Corporation (SRC) and Defense Advanced Research Projects Agency (DARPA) through the Applications Driving Architectures (ADA) Research Center

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

https://ieeexplore.ieee.org/ielam/5503868/9991262/9973355-aam.pdf

Reference52 articles.

1. Wide residual networks;zagoruyko;arXiv 1605 07146,2016

2. ASBP: Automatic Structured Bit-Pruning for RRAM-based NN Accelerator

3. SNrram: An Efficient Sparse Neural Network Computation Architecture Based on Resistive Random-Access Memory

4. Sparse ReRAM engine

5. ReCom: An efficient resistive accelerator for compressed deep neural networks

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Neural architecture search for in-memory computing-based deep learning accelerators;Nature Reviews Electrical Engineering;2024-05-20

2. A Heuristic and Greedy Weight Remapping Scheme with Hardware Optimization for Irregular Sparse Neural Networks Implemented on CIM Accelerator in Edge AI Applications;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22

3. An 11T1C Bit-Level-Sparsity-Aware Computing-in-Memory Macro With Adaptive Conversion Time and Computation Voltage;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

4. KERNTROL: Kernel Shape Control Toward Ultimate Memory Utilization for In-Memory Convolutional Weight Mapping;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

5. TT-CIM: Tensor Train Decomposition for Neural Network in RRAM-Based Compute-in-Memory Systems;IEEE Transactions on Circuits and Systems I: Regular Papers;2024