A 44.1TOPS/W Precision-Scalable Accelerator for Quantized Neural Networks in 28nm CMOS

Author:

Ryu Sungju,Kim Hyungjun,Yi Wooseok,Koo Jongeun,Kim Eunhwan,Kim Yulhwa,Kim Taesu,Kim Jae-Joon

Publisher

IEEE

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Area-efficient AdderNet hardware accelerator with merged adder tree structure;IEICE Electronics Express;2023-12-10

2. Scoping the Landscape of (Extreme) Edge Machine Learning Processors;Towards Heterogeneous Multi-core Systems-on-Chip for Edge Machine Learning;2023-07-03

3. Extreme Partial-Sum Quantization for Analog Computing-In-Memory Neural Network Accelerators;ACM Journal on Emerging Technologies in Computing Systems;2022-10-13

4. GQNA: Generic Quantized DNN Accelerator With Weight-Repetition-Aware Activation Aggregating;IEEE Transactions on Circuits and Systems I: Regular Papers;2022-10

5. A Novel DNN Accelerator for Light-weight Neural Networks: Concept and Design;2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS);2022-06-13

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