Parasitic Capacitance Modeling of Inductors Without Using the Floating Voltage Potential of Core-Reference-Cited by-同舟云学术

Parasitic Capacitance Modeling of Inductors Without Using the Floating Voltage Potential of Core

Published:2022-03 Issue:3 Volume:69 Page:3214-3222
ISSN:0278-0046
Container-title:IEEE Transactions on Industrial Electronics
language:
Short-container-title:IEEE Trans. Ind. Electron.

Author:

Zhao Hongbo^ORCID,Shen Zhan^ORCID,Dalal Dipen Narendra^ORCID,Jorgensen Asger Bjorn^ORCID,Wang Xiongfei^ORCID,Munk-Nielsen Stig^ORCID,Uhrenfeldt Christian^ORCID

Funder

MVolt project

Department of Energy Technology of Aalborg University

Innovation Fund Denmark, Siemens Gamesa Renewable Energy, Vestas Wind Systems, and KK Wind Solutions

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

http://xplorestaging.ieee.org/ielx7/41/9638580/09390371.pdf?arnumber=9390371

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