Author:
Hsin-Chou Chi ,Jia-Hung Chen
Cited by
3 articles.
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2. Review of Network on Chip Architectures;Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering);2017-07-07
3. An accurate and highly-efficient performance evaluation approach based on queuing model for on-chip network;Science China Information Sciences;2012-10-20