Dead-Time Compensation in Active NPC Three-Level Inverters Considering Current Ripple-Reference-Cited by-同舟云学术

Dead-Time Compensation in Active NPC Three-Level Inverters Considering Current Ripple

Published:2023-03 Issue:1 Volume:9 Page:1189-1199
ISSN:2332-7782
Container-title:IEEE Transactions on Transportation Electrification
language:
Short-container-title:IEEE Trans. Transp. Electrific.

Author:

Wan Wenchao¹^ORCID,Yu Tianbao¹^ORCID,Duan Shanxu¹^ORCID

Affiliation:

1. State Key Laboratory of Advanced Electromagnetic Engineering and Technology, School of Electric and Electronic Engineering, Huazhong University of Science and Technology, Wuhan, China

Funder

National Key Research and Development Program of China

National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Energy Engineering and Power Technology,Transportation,Automotive Engineering

Link

http://xplorestaging.ieee.org/ielx7/6687316/10050348/09749243.pdf?arnumber=9749243

Reference32 articles.

1. Multiple PR Current Regulator based Dead-time Effects Compensation for Grid-forming Single-Phase Inverter

2. Mixed PWM for Dead-Time Elimination and Compensation in a Grid-Tied Inverter

3. The analysis and compensation of dead-time effects in PWM inverters

4. Dead Time Effect on the Double-Loop Control Strategy for a Boost Inverter

5. Space Vector Modulator for Vienna-Type RectifiersBased on the Equivalence BetweenTwo- and Three-Level Converters:A Carrier-Based Implementation

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