Author:
Chung Yuan-Dar,Lin Rung-Bin
Cited by
6 articles.
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1. Sub-10nm Standard Cell Library Design Methodology for On-Grid Pin Accesses;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. Improving Pin Accessibility of Standard Cells under Power/Ground Stripes;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26
3. Scalable Synthetic Circuit Generation using Geometry Embedding for CAD Tool Assessment;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28
4. Improving Pin Accessibility of Standard Cell Libraries in 7nm Technology;2022 23rd International Symposium on Quality Electronic Design (ISQED);2022-04-06
5. Design and Analysis of 7nm FinFET Full Custom Standard Cell Library using ASAP7 PDK;2022 6th International Conference on Computing Methodologies and Communication (ICCMC);2022-03-29