Selective harmonic elimination in a seven level cascaded multilevel inverter based on graphical analysis
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/7782522/7792929/07793099.pdf?arnumber=7793099
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Real-Time Lagrange-Polynomials Selective Harmonic Elimination for Unbalanced Five-Level Inverters;IEEE Transactions on Industry Applications;2024-07
2. A Novel Graphical Technique for Multiple Harmonic Mitigation in a Two-Level Inverter With Only Two Switching Angles;IEEE Journal of Emerging and Selected Topics in Power Electronics;2024-06
3. Selective Harmonic Elimination PWM Technique Based on Higher Order Sliding Modes: Generalized Formulation;IEEE Journal of Emerging and Selected Topics in Power Electronics;2024-02
4. A Novel Selective Harmonic Mitigation PWM Technique With THD Minimization Using Second-Order Sliding Modes;IEEE Transactions on Industrial Electronics;2024
5. A comparison between SHE and SHM techniques based on PAWM for CHB multilevel inverters;2023 International Conference on Control, Automation and Diagnosis (ICCAD);2023-05-10
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