Shared Cache Based on Content Addressable Memory in a Multi-Core Architecture-Reference-Cited by-同舟云学术

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Shared Cache Based on Content Addressable Memory in a Multi-Core Architecture

Published:2023 Issue:3 Volume:74 Page:4951-4963
ISSN:1546-2226
Container-title:Computers, Materials & Continua
language:en
Short-container-title:

Author:

Abumwais Allam,Obaid Mahmoud

Publisher

Computers, Materials and Continua (Tech Science Press)

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Modeling and Simulation,Biomaterials

Reference18 articles.

1. Runtime-driven shared last-level cache management for task-parallel programs;Pan,2015

2. The MPCAM based multi-core processor architecture: A contention free architecture;Abumwais;Wseas Transactions on Electronics,2018

3. Cache contention management on a multicore processor based on the degree of contention exceeding a threshold;Mars;Patent and Trademark Office,2016

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design and Implementation of Synchronous Dual-Port Memory;2024 Third International Conference on Distributed Computing and Electrical Circuits and Electronics (ICDCECE);2024-04-26

2. New Content Addressable Memory Architecture for Multi-Core Applications;Computer Memory and Data Storage;2024-01-10

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