Optimized Image Multiplication with Approximate Counter Based Compressor-Reference-Cited by-同舟云学术

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Optimized Image Multiplication with Approximate Counter Based Compressor

Published:2022 Issue:2 Volume:72 Page:3815-3834
ISSN:1546-2226
Container-title:Computers, Materials & Continua
language:en
Short-container-title:

Author:

Maria Dominic Savio M.,Deepa T.,Bharathiraja N.,Bonasu Anudeep

Publisher

Computers, Materials and Continua (Tech Science Press)

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Modeling and Simulation,Biomaterials

Reference28 articles.

1. Low power CMOS pass logic 4-2 compressor for high-speed multiplication;Radhakrishnan,2000

2. An energy efficient approximate adder with carry skips for error resilient neuromorphic VLSI systems;Kim,2013

3. High speed vedic multiplier designs-A review;Bansal,2014

4. A hybrid algorithm based on PSO and GA for feature selection;Yu;Journal of Cybersecurity,2021

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