SCALING OF InGaAs/InAlAsHBTs FOR HIGH SPEED MIXED-SIGNAL AND mm-WAVE ICs

Abstract

High bandwidths are obtained with heterojunction bipolar transistors by thinning the base and collector layers, increasing emitter current density, decreasing emitter contact resistivity, and reducing the emitter and collector junction widths. In mesa HBTs, minimum dimensions required for the base contact impose a minimum width for the collector junction, frustrating device scaling. Narrow collector junctions can be obtained by using substrate transfer processes, or -if contact resistivity is greatly reduced -by reducing the width of the base Ohmic contacts in a mesa structure. HBTs with submicron collector junctions exhibit extremely high f max and high gains in mm-wave ICs. Logic gate delays are primarily set by depletion-layer charging times, and neither fτ nor f max is indicative of logic speed. For high speed logic, epitaxial layers must be thinned, emitter and collector junction widths reduced, current density increased, and emitter parasitic resistance decreased. Transferred-substrate HBTs have obtained 21 dB unilateral power gain at 100 GHz. If extrapolated at -20 dB/decade, the power gain cutoff frequency f max is 1.1 THz. Transferred-substrate HBTs have obtained 295 GHz f τ . Demonstrated ICs include lumped and distributed amplifiers with bandwidths to 85 GHz, 66 GHz master-slave flip-flops, and 18 GHz clock rate Δ-Σ ADCs.