CHARGE TRAPPING IN SOL–GEL-DERIVED COATINGS ON Si WAFERS

Abstract

Sol–gel techniques are particularly useful for the formation of thin oxide films on various substrates, which can be important for many technological applications. In microelectronic technology these films can be used as passivation layers, diffusion and oxidation barriers, intermetal dielectrics (IMD) and so on. Sol–gel-derived oxides are obtained from tetraethoxysilane, which is used as precursor and a two-step process involving acid catalysts. Varying the composition of the sol–gel solution, optical and electrical properties of the resulted films can be changed. In the present work, HF and HNO 3 were used as catalyst in order to vary the electrical properties of the films. Oxides were deposited on Si substrates and MIS (metal–insulator–semiconductor) structures were fabricated. Electrical properties of the coatings were studied by the C–V (capacitance–voltage) method. Fourier transform infrared spectroscopy (FTIR) measurements ware employed to investigate the chemical bonding structure. The results show evidence of the existence of charge trapping in the TEOS/HNO 3 films when MIS capacitors are biased from accumulation to inversion condition. This fact can be applied in the semiconductor device technology.