MICROSCOPIC UNDERSTANDING AND CONTROL OF SURFACES AND INTERFACES OF COMPOUND SEMICONDUCTORS FOR MESOSCOPIC DEVICES

Abstract

Microscopic properties of free surfaces and metal–semiconductor interfaces related to successful realization of mesoscopic devices are discussed for III–V compound semiconductors, with a particular emphasis on Fermi level pinning. Surface states causing pinning are present even on freshly MBE-grown clean (001) and (110) surfaces with well-defined surface structures. Scanning tunneling spectroscopy (STS) measurement gives anomalous spectra with large conductance gaps, and this can be explained by tip-induced local charging of surface states. Pinning on free surfaces can be considerably suppressed by a surface passivation using an ultrathin MBE-grown silicon interface control layer (Si ICL). In mesoscopic scale metal–semiconductor contacts, Fermi level pinning underneath the metal contact itself is remarkably reduced with the use of the optimum in situ electrochemical metal deposition. However, Fermi level pinning on the surrounding free surfaces has large effects on current transport and capacitance properties in such contacts.