Perimeter Gated Single Photon Avalanche Diodes in Sub-Micron and Deep-Submicron CMOS Processes

Author:

Shawkat Mst Shamim Ara1,Habib Mohammad Habib Ullah1,Hasan Md Sakib1,Haque Mohammad Aminul1,McFarlane Nicole1

Affiliation:

1. Department of Electrical Engineering and Computer Science, University of Tennessee, Knoxville, TN 37996, USA

Abstract

A perimeter gated SPAD (PGSPAD), a SPAD with an additional gate terminal, prevents premature perimeter breakdown in standard CMOS SPADs. At the same time, a PGSPAD takes advantage of the benefits of standard CMOS. This includes low cost and high electronics integration capability. In this work, we simulate the effect of the applied voltage at the perimeter gate to develop a consistent electric field distribution at the junction through physical device simulation. Additionally, the effect of the shape of the device on the electric field distribution has been examined using device simulation. Simulations show circular shape devices provide a more uniform electric field distribution at the junction compared to that of rectangular and octagonal devices. We fabricated PGSPAD devices in a sub-micron process (0.5 μm CMOS process and 0.5 μm high voltage CMOS process) and a deep-submicron process (180 nm CMOS process). Experimental results show that the breakdown voltage increases with gate voltage. The breakdown voltage increases by approximately 1.5 V and 2.5 V with increasing applied gate voltage magnitude from 0 V to 6 V for devices fabricated in 0.5 μm and 180 nm standard CMOS process respectively.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electronic, Optical and Magnetic Materials

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