Design of Nonlinear Delay Differential System for Analyzing Vulnerabilities in Nanoscale Hardware Implants: A Deep Dive into Intelligent Computing Networks

Author:

Asif Raja Muhammad Junaid Ali1ORCID,Masood Zaheer2ORCID,Hussain Ijaz3ORCID,Zameer Aneela3ORCID,Mehmood Ammara4ORCID,Raja Muhammad Asif Zahoor5ORCID

Affiliation:

1. Department of Computer Science and Information Engineering, National Yunlin University of Science and Technology, Douliou, Yunlin 64002, Taiwan

2. Department of Electrical Engineering, Capital University of Science and Technology, Islamabad, Pakistan

3. Department of Computer and Information Sciences, Pakistan Institute of Engineering & Applied Sciences Islamabad, Pakistan

4. School of Electrical and Data Engineering, University of Technology Sydney, Australia

5. Future Technology Research Center, National Yunlin University of Science and Technology, Douliou, Yunlin 64002, Taiwan

Abstract

In the annals of contemporary innovation, the study of miniature marvels nanoscale hardware implants emerged as a pivotal instrument, scarcely perceptible to the naked eye, embodies a prowess of cutting-edge technologies and clandestine intrigue. The objective of this research is to introduce a time delay nonlinear system for nanoscale hardware implants vulnerabilities that portray the exploitation of a system by utilizing the stupendous knacks of advanced deep bidirectional long short-term memory (LSTM) networks for time series predictions. Firmware-level bugs present the potential for escalating privileges and executing of code remotely beneath the operating system, allowing for infiltration or complete intervention within a computer system. The designed deep bidirectional LSTM is configured to precisely predict and forecast the dynamic states of time delay differential system, offering a robust framework for mimicking delays that commonly manifest in the real cyber-physical systems. To orchestrate the system compromises in real scenarios through the activation of bugged hardware, time delay factors [Formula: see text] and [Formula: see text] are introduced to account the time delays necessary for exploiting the bugged and patched nodes, respectively. Synthetic data is generated to train the LSTM network for all scenarios of the model for the dynamics of bugged, compromised, patched nodes and these acquired information is used for training, testing and validation purposes regarding exploitation of the bugged hardware. Comparative analysis on exhaustive simulations revealed a minimal difference between the LSTM’s predictions and those from the numerical outcomes with MSE in the range of [Formula: see text], underscoring the network’s effectiveness, robustness and stability in modeling complex system dynamics of hardware vulnerabilities.

Funder

National Science and Technology Council (NSTC), Taiwan

Publisher

World Scientific Pub Co Pte Ltd

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