Affiliation:
1. Department of Electronics, Technological Education Institute of Crete, Branch at Chania, 3, Romanou Str, Chalepa, 73133 Chania, Crete, Greece
Abstract
In this paper, efficient pipelined architectures for the implementation of the Transform Domain LMS (TD-LMS) adaptive filter are considered. Pipelining of the TD-LMS algorithm is achieved by introducing an amount of time delay into the original adaptive scheme. The resulting algorithm, called thereafter the delayed TD-LMS, performs adaptive filtering with delayed coefficients adaptation. A statistical performance analysis of the proposed delayed TD-LMS adaptive algorithm is presented, both for the mean error and the mean squared error of the filter coefficients. A closed form expression is derived for the estimation of the steady state excess mean squared error, in terms of the adaptation delay and the input signal characteristics. The adaptation delay introduced to the delayed TD-LMS algorithm is subsequently utilized for the development of pipelined architectures. By retiming the delays existing in the error signal feedback loop, efficient pipelined implementations of the delayed TD-LMS algorithm are developed. The proposed architectures are suitable for parallel implementation on a general-purpose parallel machine, or on dedicated hardware, integrated on ASIC or ASIP VLSI processors.
Publisher
World Scientific Pub Co Pte Lt
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture
Cited by
2 articles.
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