A High Throughput and Pipelined Implementation of the LUKS on FPGA

Abstract

The Linux Unified Key Setup (LUKS) is the standard key management scheme for the full disk encryption solution implemented in Linux-based operating systems. It is composed of PBKDF2, an anti-forensic splitter, and a cipher. In this paper, a new FPGA-based high-throughput and pipelined implementation of LUKS is presented. We design a four-stage pipelined SHA-1 module without the multiplexers between piecewise function and a total eight-stage pipelined PBKDF2 by reusing two hash results. Besides, we implement ST box-based AES decipher with BRAM resources, which improves the performance and leaves most of the slice resources to PBKDF2 architecture. By using the above techniques, we instantiate a high throughput LUKS co-processor in a Xilinx Zynq 7030 FPGA. Compared to the previous work of implementation of LUKS PBKDF2 with AES on FPGA, our design shows better improvement of the speed and efficiency by 16 times and 8 times, respectively. Our speed of LUKS key recovery is even faster than Nvidia GPU GTX480.