High-Level Implementation of a Chaotic and AES Based Crypto-System

Abstract

Given the increasing complexity of cryptographic devices, testing their security level against existing attacks requires a fast simulation environment. SystemC is a standard language that is widely used for the modeling and the verification of complex systems. It is a promising candidate in Electronic System Level (ESL) which allows models to reach higher simulation speed. Accordingly, the Advanced Encryption Standard (AES) is one of the most known block ciphers. It is widely used in various applications in order to secure the sensitive data. It is considered to be secure. Still, some issues lie in the used key and the S-Box. This paper presents a SystemC implementation of a chaos-based crypto-processor for the AES algorithm. The design of the proposed architecture is studied using the SystemC tools. The proposed correction approach exploits the chaos theory properties to cope with the defaulting parameters of the AES algorithm. Detailed experimental results are given in order to evaluate the security level and the performance criteria. In fact, the proposed crypto-system presents numerous interesting features, including a high security level, a pixel distributing uniformity, a sufficiently large key-space with improved key sensitivity, and an acceptable speed.