Affiliation:
1. School of Automation Engineering, University of Electronic Science and Technology of China, 2006 Xiyuan, Avenue, West Hi-Tech Zone, Chengdu 611731, China
Abstract
Low output frequency and spurs are main imperfections in direct digital frequency synthesis (DDFS). For increasing output frequency determined by sampling rate, the structure of multi-path pseudo-interleaved DDFS is proposed. However, it introduces more complex phase truncation error than single path DDFS. In order to analyze the effect of phase truncation error, the model of pseudo-interleaved DDFS with phase truncation is established. Based on the model, the distribution and amplitude of spur caused by phase truncation are discussed and calculated. Then some important conclusions are drawn and proved by experiment, which can provide theoretical supports for spurious performance evaluation and parameter selection while designing signal source or clock generator based on pseudo-interleaved DDFS.
Publisher
World Scientific Pub Co Pte Lt
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture
Cited by
2 articles.
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