Analysis and Simulation of Current Balancer Circuit for Phase-Gain Correction of Unbalanced Differential Signals

Abstract

The phase and gain imbalance of a balun output can be adjusted by a differential current balancer (DCB) circuit. The performance of DCB circuit, for correcting the phase (gain) imbalance, is analyzed for a wide range of input signal level, and the accuracy is verified with circuit simulation. To illustrate the phase-error/gain-error (PE/GE) correction, a 30–40 GHz DCB circuit is designed and simulated in a 180-nm CMOS process. The DCB is examined for input PE, [Formula: see text], of [Formula: see text] and input GE, GA, of [Formula: see text]dB[Formula: see text] log [Formula: see text] dB. Analysis and simulation illustrate an output phase error (OPEDCB) of [Formula: see text] and output gain error (OGEDCB) of [Formula: see text] dB [Formula: see text] dB, over frequency range of 20–50[Formula: see text]GHz. The results of DCB circuit for PE (GE) compensation are compared to that of phase-correction technique (PCT) circuit, illustrating the superior phase (gain) imbalance correction of the DCB circuit with lower NF and DC power consumption.