Affiliation:
1. School of Electronic and Optical Engineering, Nanjing University of Science and Technology, Nanjing 210094, P. R. China
Abstract
Reliability evaluation by using probabilistic computational models has become an important research field in modern digital designs. Based on the profound understanding of different reliability evaluation methods, this paper proposes a universal model for signal probability and reliability analysis of logic circuits. The proposed Signal Probability Level Matrix (SPLM) provides us with the reliability and signal probability of the entire circuit as well as individual outputs. We can deal with SPLM very flexibly depending on different applications and design constraints. The accuracy and efficiency of the proposed model have been proved and verified by representative circuits in literatures. Furthermore, the proposed model is particularly useful in reliability assessment in cascade-structure circuits such as ripple carry adders.
Funder
National Natural Science Foundation of China
Publisher
World Scientific Pub Co Pte Lt
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture
Cited by
1 articles.
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