A Game Theory-Based Heuristic for the Two-Dimensional VLSI Global Routing Problem

Author:

Siddiqi Umair F.1,Sait Sadiq M.2,Shiraishi Yoichi3

Affiliation:

1. Center for Communications & Information Technology Research, Research Institute, King Fahd University of Petroleum & Minerals, Dhahran 31261, Saudi Arabia

2. Center for Communications & Information Technology Research, Department of Computer Engineering, College of Computer Science & Engineering, King Fahd University of Petroleum & Minerals, Dhahran 31261, Saudi Arabia

3. Department of Mechanical Science and Technology, School of Science and Technology, Gunma University, 29-1 Honcho, Ota-Shi, Gunma 373-0052, Japan

Abstract

In this work we propose a game theory (GT)-based global router. It works in two steps: (i) Initial routing of all nets using maze routing with framing (MRF) and (ii) GT-based rip-up and reroute (R&R) process. In initial routing, the nets are divided into several small subsets which are routed concurrently using multithreading (MT). The main task of the GT-based R&R process is to eliminate congestion. Nets are considered as players and each player employs two pure strategies: (attempt to improve its spanning tree, and, do not attempt to improve its spanning tree). The nets also have mixed strategies whose values act as probabilities for them to select any particular pure strategy. The nets which select their first strategy will go through the R&R operation. We also propose an algorithm which computes the mixed strategies of nets. The advantage of using GT to select nets is that it reduces the number of nets and the number of iterations in the R&R process. The performance of the proposed global router was evaluated on ISPD'98 benchmarks and compared with two recent global routers, namely, Box Router 2.0 (configured for speed) and Side-winder. The results show that the proposed global router with MT has a shorter runtime to converge to a valid solution than that of Box Router 2.0. It also outperforms Side-winder in terms of routability. The experimental results demonstrated that GT is a valuable technique in reducing the runtime of global routers.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Applying reinforcement learning to learn best net to rip and re-route in global routing;ACM Transactions on Design Automation of Electronic Systems;2024-07-09

2. Congestion-Aware Rectilinear Steiner Tree Construction Using PB-SAT;Journal of Circuits, Systems and Computers;2022-03-05

3. Machine learning based effective linear regression model for TSV layer assignment in 3DIC;Microprocessors and Microsystems;2021-06

4. Performance and Memory-Efficient Parallel Computing Framework for RSMT Construction;Advances in Intelligent Systems and Computing;2020

5. Memory and I/O Optimized Rectilinear Steiner Minimum Tree Routing For VLSI;International Journal of Electronics, Communications, and Measurement Engineering;2020-01

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