A 10-Bit 20 Channel LCD Column Driver Using Compact DAC

Abstract

A 20-channel liquid crystal display (LCD) driver architecture is implemented with [Formula: see text]m CMOS technology. This work presents a novel design of 10-bit compact and high-resolution two-stage DAC to improve the linearity and uniformity of each channel performance. A complete column driver, including a compact DAC, low power buffer, global R-string and multiplexing circuit design, is implemented, and the layout of this 20-channel, 10-bit LCD driver is generated using [Formula: see text]m CMOS technology. All the circuit blocks of the proposed LCD column driver were simulated using the EDA tool HSPICE and layout generation by Laker. This work also realizes a high-performance class AB operational amplifier with a gain of 140[Formula: see text]dB for the proposed LCD driver. The 10-bit compact LCD driver has a 1.4 mV LSB and an output voltage of 1.7 V is achieved for the input range of 0.25–1.7[Formula: see text]V. The compact DAC voltage selector with decoder in this design uses fewer switches in comparison to conventional tree-type RDAC, occupying a smaller chip area with fast response. The proposed design is sufficiently robust for high-color depth and resolution LCD driver applications. The experimental results exhibit maximum differential nonlinearity (DNL) and integral nonlinearity (INL) of 0.065 LSB and −0.12 LSB, respectively. The one channel area is [Formula: see text]m and the settling time is [Formula: see text]s for the [Formula: see text] and 20[Formula: see text]pF driving load.