A High Bandwidth Compact Integrable Configuration of Floating Memristor Emulator

Author:

Bhardwaj Kapil1ORCID,Srivastava Mayank1ORCID

Affiliation:

1. Department of Electronics and Communication Engineering, National Institute of Technology Jamshedpur, Jharkhand, India

Abstract

A compact memristor emulator structure using ten CMOS transistors-based structures is presented with a fully floating circuit configuration. Along with the use of such a compact CMOS structure to form a transconductance cell, the circuit requires only a single grounded capacitance and two external MOS transistors. Unlike several externally employed transconductance cells-based memristor emulators reported previously, the proposed circuit can be considered a compact architecture due to the non-employment of any external multiplier and floating passive elements, and also a lesser number of used transistors. The electronic tunability and wide-band operating frequency range (400[Formula: see text]Hz–50[Formula: see text]MHz) are the other attractive features of the proposed emulator. The circuit has been tested by performing simulations using PSPICE with 0.18[Formula: see text][Formula: see text]m CMOS technology. The presented simulation results clearly show the ideal non-volatile nature found in the realized memristor, which has also been employed in a neuron circuit based on the proposed emulator depicted in the article. The neuron circuit has been used to generate a spike output by applying a post-synaptic signal equivalent DC input. Finally, the circuit idea of the proposed memristor emulator has been tested by using commercial IC LM13700.

Publisher

World Scientific Pub Co Pte Ltd

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

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