An Efficient and High-Speed Implementation of QRD-MGS Algorithm for STAP Application Based on Floating Point FPGAs

Author:

Hasanikhah Narjes1,Amin-Nejad Siavash2ORCID,Darvish Ghafar1,Moniri M. R.3

Affiliation:

1. Department of Electrical and Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran 1477893855, Iran

2. Department of Electrical Engineering, University of Guilan, Rasht 4199613776, Iran

3. Department of Electrical Engineering, Yadegar-e-Emam Branch, Islamic Azad University, Tehran 1815163111, Iran

Abstract

Space-Time Adaptive Processing (STAP) can harness the efficacy of interference and clutter significantly. Calculations of the STAP weights involve solving linear equations which require very intensive computations. In this paper, the QR decomposition (QRD) using the modified gram-schmidt (MGS) algorithm is parameterized with vector size to create a trade-off between the hardware resources utilization and computation time. To achieve an efficient floating point structure, the proposed architecture of QRD-MGS algorithm is simulated and implemented in two modes: single-vector and multi-vector. Results show that the multi-vector method can lead to a high-performance design with higher operating frequency, lower power consumption, and less resource utilization than the single-vector method. For example, Modelism simulations show that the decomposition of a [Formula: see text] matrix with vector size of 17 takes 7.86[Formula: see text][Formula: see text]s with the maximum clock frequency of 282[Formula: see text]MHz, for implementation on the Arria10 FPGA. In real STAP applications, the matrix sizes are too large to be fit on FPGAs and the update rate of the weights are high. Therefore, this method can fit any matrix in the contemporary FPGAs with an acceptable update rate.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. High-Radix Formats for Enhancing Floating-Point FPGA Implementations;Circuits, Systems, and Signal Processing;2021-12-02

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